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» DVM Test Report: LL_Nominal|F_Low|Disabled|80% Load|FindACSteadyState

Test Details
Schematic DVM -- PFC_CCM_sync_DLL.sxsch
Test LL_Nominal|F_Low|Disabled|80% Load|FindACSteadyState
Date / Time 22/03/2022 07:27
Report Directory DVM_REPORTS\2022-03-22-06_18\LL_Nominal\F_Low\Disabled\80% Load\FindACSteadyState
Log File report.txt
Screenshot schematic.png
Status PASS
Simulator simplis
Deck input.deck
Init input.deck.init
Measured Scalar Values
Frequency(SRC) 50
ILOAD
MIN
199.12137m
MAX
200.98267m
ISRC
MIN
-994.38933m
MAX
994.38933m
VLOAD
MIN
398.24274
MAX
401.96533
VLOAD %_diff_last_2_linecycles 0.00000076818413%
VLOAD At Simulation Start Time
AVG
400.09392
VLOAD Last LineCycle
AVG
400.094
VLOAD Previous LineCycle
AVG
400.094
VSRC
MIN
-169.99978
MAX
169.99978
RMS
120.208
Measured Spec Values
AC_Settling(LOAD) PASS: Voltage across LOAD has settled to (7.68184n) % and is less than or equal to Max Settling Spec of (10m) %
Max_VLOAD PASS: Max. Output1 Voltage (401.965) is less than or equal to Max. Output1 Voltage Spec (420)
LOAD
VLOAD
ILOAD
SXGPH File simplis_tran62_4624.sxgph
SRC
VSRC
ISRC
SXGPH File simplis_tran62_4613.sxgph
Other SXGPH Files
Output#tran simplis_tran62_4511.sxgph
Vdc-Vdrain#tran simplis_tran62_4522.sxgph
SIGNAL#tran simplis_tran62_4538.sxgph
Samples#tran simplis_tran62_4549.sxgph
COMP#tran simplis_tran62_4570.sxgph
triggers#tran simplis_tran62_4591.sxgph
VL#tran simplis_tran62_4602.sxgph
Load_offset#tran simplis_tran62_4656.sxgph