» SIMPLIS DVM Test Report Overview

Schematic 6.6.2_LTC3406B - DVM ADVANCED.sxsch
Testplan dvm_advanced.testplan
Original Testplan Filename 6.6.2_arbitrary_curve_final.testplan
Date / Time 2015-12-10 5:53 PM
Report Directory use_arbitrary_curve
Log File dvm_advanced.log
# of Tests Run 1 of 1 (All Pass)
Total Time 8s
Design Specifications
Circuit Name LTC3406B
Description Synchronous Buck
Input 1 5.000 V (4.5 V to 5.5 V)
Output 1 1.505 V (±5%) @ 1.5 A
Switching Frequency 955kHz
Excel-compatible Results
Scalar Results dvm_advanced_table_scalars.txt
Spec Results dvm_advanced_table_specs.txt
Statistic Results dvm_advanced_table_statistics.txt
Statistic Specs dvm_advanced_table_statspecs.txt
Test 1 of 1top ▲
Test Label Steady-State|Steady-State|Vin Maximum|100% Load
Simulator simplis
Test Report Steady-State\Steady-State\VinMaximum\100% Load\report.txt.html
Status PASS
Test Time 8s