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» DVM Test Report: Steady-State|Steady-State|Vin Nominal|40%

Test Details
Schematic 4.2_LTC3406B - DVM ADVANCED.sxsch
Test Steady-State|Steady-State|Vin Nominal|40%
Date / Time 12/10/2015 5:43 PM
Report Directory run_blt_in_and_prmt_grphs\Steady-State\Steady-State\VinNominal\40%
Log File report.txt
Screenshot schematic.png
Status PASS
Simulator simplis
Deck input.deck
Init input.deck.init
Measured Scalar Values
Efficiency 82.1615%
Efficiency_nom 82.1615%
Frequency(CLK) 955.653k
ILOAD
AVG
600.258m
MIN
598.695m
MAX
601.558m
RMS
600.259m
PK2PK
2.86309m
ISRC
AVG
220.028m
MIN
423.376u
MAX
878.027m
RMS
377.578m
PK2PK
877.603m
Power(LOAD) 903.775m
Power(SRC) 1.1
VLOAD
AVG
1.50564
MIN
1.50172
MAX
1.5089
RMS
1.50564
PK2PK
7.18152m
VSRC
AVG
4.99978
MIN
4.99912
MAX
5
RMS
4.99978
PK2PK
877.603u
Measured Spec Values
Max_VLOAD PASS: Max. Output1 Voltage (1.5089) is less than or equal to Max. Output1 Voltage Spec (1.58025)
Min_VLOAD PASS: Min. Output1 Voltage (1.50172) is greater than or equal to Min. Output1 Voltage Spec (1.42975)
LOAD
VLOAD
ILOAD
SXGPH File simplis_pop5_159.sxgph
SRC
VSRC
ISRC
SXGPH File simplis_pop5_149.sxgph
default
CLK
ILOUT
SW
VOUT
SXGPH File simplis_pop5_154.sxgph
Other SXGPH Files
clock#pop simplis_pop5_141.sxgph